1. Field of the Invention
The present invention relates to a method for manufacturing a defect-free silicon single crystal ingot, namely, the single crystal ingot of pure silicon, by pulling up the ingot using the Czochralski method (hereinafter, the CZ method).
2. Description of the Related Art
Factors which reduce a yield of a device, due to extreme-miniaturization of semiconductor integrated circuits in recent years, include a crystal originated particle (hereinafter, referred to as the COP) originating from a crystal, a minute defect of an oxygen precipitate which is to be a nucleus of an oxidation induced stacking fault (hereinafter, referred to as the OSF), or presence of an interstitial-type large dislocation (hereinafter, referred to as L/D).
The COP is a pit, which appears on a wafer surface when a mirror-ground silicon wafer is washed with a mixed solution of ammonia and hydrogen peroxide. When this wafer is measured by a particle counter, this pit is detected as the particle. This pit originates from the crystal The COP would be a factor to degrade a time dependent dielectric breakdown (TDDB) of an oxide film, a time zero dielectric breakdown (TZDB) of the oxide film, or the like. In addition, if the COP is present on the wafer surface, a step may be produced upon wiring process of the device, causing disconnection. It may also cause leakage or the like at a device isolation portion, degrading the yield of a product.
Minute oxygen precipitate nuclei are introduced into the silicon single crystal while the crystal being grown. The OSF is a defect formed by actualizing the nuclei at thermal oxidation process or the like upon manufacturing a semiconductor device. This OSF causes a failure such as leakage current of the device being increased. The L/D is also referred to as a dislocation cluster or a dislocation pit, because the pit is generated when the defective silicon wafer is immersed in a selective etching liquid including fluoric acid as a major component. This L/D also causes the degradation in electrical properties, e.g., a leak property, an isolation property, or the like. From the above, it is necessary to reduce the COP, the OSF, and the L/D in the silicon wafer used to manufacture the semiconductor integrated circuit.
A method for manufacturing the defect-free silicon single crystal wafer, which does not have the COP, the OSF, and the L/D, is disclosed (for example, see Patent Document 1). The method for manufacturing the defect-free silicon single crystal wafer comprises a step of pulling up the ingot from a silicon melt in a hot zone furnace at a pulling-up speed profile, which is high enough so as to prevent interstitial bulk (agglomerates of an interstitial silicon type point defect) and low enough so as to limit vacancy bulk (agglomerates of an vacancy type point defect) within a vacancy-rich region along the axial direction of the ingot. For this reason, where the pulling-up speed of the ingot is V (mm/min.) and a temperature gradient in the axial direction near a solid-liquid interface of the silicon melt and the ingot is G (° C./mm), a plurality of wafers constituted of a defect-free region, in which the agglomerates of the vacancy type point defect and the agglomerates of the interstitial silicon type point defect are not present, can be manufactured from one ingot by precisely controlling V/G.
From the described above, it can be understood that the defect-free ingot is made within a range of V/G (mm2/min. ° C.), where the OSF (P band), which is generated in a ring form when the thermal oxidation is performed, disappears at the center of the wafer and the L/D (B band) is not generated. In order to improve the productivity, the yield, or the like of the defect-free ingot, it is required to expand a width of the pulling-up speed of the ingot, namely, a pure margin, for producing the defect-free region in the pulling-up direction and radial direction of the ingot. The pure margin is considered to have some correlation with a shape of the solid-liquid interface upon pulling up the ingot
Thus, methods of using the shape of the solid-liquid interface as a control factor for manufacturing the defect-free ingot have been studied, and a method for manufacturing the defect-free ingot by considering the shape of the solid-liquid interface of the silicon melt and the silicon single crystal ingot is disclosed (for example, see Patent Document 2). In the method for manufacturing the defect-free ingot, the defect-free ingot can be manufactured with stability and sufficient repeatability by appropriately adjusting the relation between the shape of the solid-liquid interface, which is the interface between the silicon melt and the silicon single crystal ingot, and temperature distribution on a side of the ingot being pulled up.
[Patent Document 1] Japanese Unexamined Patent Publication No. 11-1393 corresponding to U.S. Pat. No. 6,045,610 (claim 1, paragraph [0116])
[Patent Document 2] Japanese Unexamined Patent Publication No. 2001-261495 (claim 1, paragraph [0148])
However, in the conventional methods described above, namely, the method for manufacturing the defect-free silicon single crystal wafer described in Japanese Unexamined Patent Publication No. 11-1393 corresponding to U.S. Pat. No. 6,045,610 or the method for manufacturing the defect-free ingot described in Japanese Unexamined Patent Publication No. 2001-261495, deformation of a crucible storing the silicon melt is not taken into consideration, so that there has been a failure that a defective portion is generated inside the ingot even when a gap between the surface of the silicon melt and a bottom end of a thermal shield member encircling the ingot being pulled up is set to a predetermined value. Specifically, since the crucible is deformed when silicon material supplied to the crucible is melted with a heater, causing a peripheral wall of the crucible becoming thinner and a height thereof becoming low as well as a bottom wall of the crucible becoming thick, a position of the crucible in the vertical direction with respect to the heater is displaced even when the gap between the surface of the silicon melt and the bottom end of the thermal shield member is set to the predetermined value. For this reason, the temperature gradient G near the solid-liquid interface between the silicon melt and the ingot is changed and thus V/G is shifted from the condition for pulling up the defect-free ingot when the pulling-up speed V of the ingot is fixed, so that there has been a problem that a defective portion is generated inside the ingot.
Meanwhile, in order to reduce the manufacture cost of the silicon single crystal ingot, a so-called multiple pull-up method, wherein a plurality of ingots are pulled up using the same crucible, may be adopted. In the multiple pull-up method, the deformation of the crucible becomes larger as the number of the pulled up ingots increases, so that there has been a problem that the defective portion generated inside the ingot increases whenever the number of the pulled up ingots increases